Address Translation Simulator

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Lab 7 (Week 10)

Address Translation (I)

Purpose

After completing the exercises in this lab and next lab (Lab 7 & 8), You will gain a better understanding through visual representation of the process for translating logical to physical addresses for both single-level and two-level paging, as well as the role of the translation look-aside buffer (TLB) in address translation. Furthermore, you will understand what a page fault is, as well as illegal memory addresses.

Overview

You will use a simulator (created by Steve Robbins) named “Address Translation Simulator” for the lab exercises in Lab 7 and Lab 8.

This simulator is mainly related to topics covered in Chapter 7 (Main Memory) and Section 8.2 (Demand Paging) of the text. Before using the simulator in this lab, you are recommended to understand the concept of a page fault discussed in the text in Section 8.2.

You also need to understand the role of the valid/invalid bit in the page table. In the single-level page table, the valid/invalid bit determines whether the mapping of the logical page number to physical frame is valid or not. If the valid bit is set to zero, this indicates a page fault. If the valid bit is set to 1, the mapping is correct, and can be used to translate the logical page number to its corresponding physical frame.

The valid/invalid bit plays a slightly different role with two-level paging. If the valid/invalid bit is set to 0 in the top-level page table, this indicates an invalid reference. Otherwise, the frame corresponding to the entry refers to the second-level page table. The valid/invalid bit in this second-level page table is used the same as in the single-level page table, indicating if the reference is a page fault or not.

The exercises for this simulator are broken up into two parts: one for single-level paging (Lab 7) and a second for two-level paging (Lab 8).

Starting the Simulator

Download the Address Translation simulator (address.zip) from LearnJCU and extract the zip file. This produces a folder named address.

The user manual for this simulator, address_doc.html, is included in this folder. It is strongly suggested that you read through this documentation describing how the simulator operates prior to beginning the following exercises.

Exercise Tasks

Perform the following steps using the address translation simulator

In the address directory execute runaddress (UNIX, Linux, Mac OS X) or runaddress.bat (Windows.) This will start the address translation simulator.

Click the yellow button labeled Single Level at the right side of the Virtual Address Translation Simulator window. Five additional buttons labeled Single Level Page Table Test 1 through Single Level Page Table Test 5 appear. The ordering of the tests is random, based upon the name of the user specified in the configuration file addressconfig in the address directory. You will use the default name for the first test in this part. Later steps will have you set the username to your name and you will submit a logfile of your activity.

Click the Single Level Page Table Test 1 button at the right of the simulator window. The Virtual Address Translation window appears. This is the window where you will translate the supplied logical address to its physical address.

Click the Progress button at the bottom left of the Virtual Address Translation window. The Single Level Page Table Progress window appears with the 10 tasks for resolving the logical address to the physical address (the window may need to be resized for you to read the entire title in the title bar).

Click the green button labeled Lifeline in the upper left-hand corner of the Virtual Address Translation window. A lifeline is an aid which helps you perform one of the steps from the progress window. (You do not have to use lifelines if you do not require such aid.) Your instructor control whether lifelines are available, and if he or she chooses to make them available, he or she can also set the number of lifelines for each test. If lifelines are not available, clicking the Lifeline button will have no effect.

Perform Task 1 in the Progress window, using the Lifeline window to find the correct location, and click to segment the logical address. (A light blue circle appears to the left of each step in the Progress window after it is successfully completed.)

Perform Task 2 in the Progress window, using the Lifeline window to find the correct location, and segment the physical address.

Perform Task 3 in the Progress window and click the Paste button to paste the offset into the physical address.

Click the TLB button at the bottom of the Virtual Address Translation window. The TLB window appears.

Click on 4. Segment TLB in the Progress window. A separate Help window appears describing the steps for completing this task. Following the steps in the Help window, segment the TLB. (You may also use the Lifeline in conjunction with the Help window.)

Perform Task 5 in the Progress window.

Perform Task 6 in the Progress window by clicking the Lookup button in the bottom left-hand corner of the TLB window. The TLB window displays a message indicating whether the frame for this logical page was found in the TLB or not. In this case, it displays “Found Frame”. Notice that Tasks 7 and 8 have been disabled; you will not complete them in this test.

Perform Task 9 in the Progress window.

Click the appropriate completion button — either Found Physical Address or Page Fault — in this case, click the Found Physical Address button.

Click the pink Quit button in the lower left-hand corner of the Virtual Address Translation window (the main window). This will terminate the simulator.

Edit the file addressconfig in the address directory and replace the name default_user with your name.

Add the following line to the addressconfig file:

logdir .

This sets the directory of the logfile to the current directory.

Execute the simulator again.

Click on the Open Log button in the lower right-hand corner of the main window.

Complete the remaining tests 2 through 5 for single level paging. You should use the Progress window, at least for the first few tests. Not all tests will use the TLB (the TLB button will be disabled in those tests).

Click the Close Log button. You have created a file called logfile.html in the address directory.

Click the Quit to terminate the simulator.

Submit your logfile — logfile.html — to your instructor per his or her instructions.

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Questions

Answer the following questions after completing Steps 1-18 above.

What is the value of page size after completing Step 3?

a) 1024
b) 4096
c) 8192
d) None of the above

What are the number of bits in the virtual address after completing Step 3?

a) 32
b) 31
c) 64
d) 30

What are the number of bits in the physical address after completing Step 3?

a) 32
b) 30
c) 23
d) 24

How many entries are in the TLB after completing Step 3?

a) 16
b) 24
c) 32
d) 8

How many bits are used in the logical address for the page offset after completing Step 6?

a) 18
b) 12
c) 10
d) 13

What is the value of the page offset after completing Step 8?

a) 000000000000
b) 101010101010
c) 110100010101
d) None of the above

How many bits in the TLB are used to represent the page after completing Step 10?

a) 18
b) 11
c) 12
d) 16

Was the logical page found in the TLB after completing Step 12?

a) Yes
b) No

What is the physical address after completing Step 14?

a) 000111010110111100110100010101
b) 11010001010100001111011
c) 00001111011110100010101
d) There was a page fault

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Assessment

1%

~ This is the End of Lab 7 ~

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